
2007
Micr
ochip
T
e
ch
nol
ogy
I
n
c.
P
reli
m
inary
DS
70165E
-page
49
dsPIC33F
TABLE 3-4:
TIMER REGISTER MAP
SFR
Name
SFR
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
TMR1
0100
Timer1 Register
xxxx
PR1
0102
Period Register 1
FFFF
T1CON
0104
TON
—
TSIDL
—
TGATE
TCKPS<1:0>
—
TSYNC
TCS
—
0000
TMR2
0106
Timer2 Register
xxxx
TMR3HLD
0108
Timer3 Holding Register (for 32-bit timer operations only)
xxxx
TMR3
010A
Timer3 Register
xxxx
PR2
010C
Period Register 2
FFFF
PR3
010E
Period Register 3
FFFF
T2CON
0110
TON
—
TSIDL
—
TGATE
TCKPS<1:0>
T32
—
TCS
—
0000
T3CON
0112
TON
—
TSIDL
—
TGATE
TCKPS<1:0>
—
TCS
—
0000
TMR4
0114
Timer4 Register
xxxx
TMR5HLD
0116
Timer5 Holding Register (for 32-bit operations only)
xxxx
TMR5
0118
Timer5 Register
xxxx
PR4
011A
Period Register 4
FFFF
PR5
011C
Period Register 5
FFFF
T4CON
011E
TON
—
TSIDL
—
TGATE
TCKPS<1:0>
T32
—
TCS
—
0000
T5CON
0120
TON
—
TSIDL
—
TGATE
TCKPS<1:0>
—
TCS
—
0000
TMR6
0122
Timer6 Register
xxxx
TMR7HLD
0124
Timer7 Holding Register (for 32-bit operations only)
xxxx
TMR7
0126
Timer7 Register
xxxx
PR6
0128
Period Register 6
FFFF
PR7
012A
Period Register 7
FFFF
T6CON
012C
TON
—TSIDL
—
TGATE
TCKPS<1:0>
T32
—TCS
—
0000
T7CON
012E
TON
—TSIDL
—
TGATE
TCKPS<1:0>
—
—TCS
—
0000
TMR8
0130
Timer8 Register
xxxx
TMR9HLD
0132
Timer9 Holding Register (for 32-bit operations only)
xxxx
TMR9
0134
Timer9 Register
xxxx
PR8
0136
Period Register 8
FFFF
PR9
0138
Period Register 9
FFFF
T8CON
013A
TON
—
TSIDL
—
TGATE
TCKPS<1:0>
T32
—
TCS
—
0000
T9CON
013C
TON
—
TSIDL
—
TGATE
TCKPS<1:0>
—
TCS
—
0000
Legend:
x
= unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.